The present claimed invention relates to the field of semiconductor processing. More particularly, the present claimed invention relates to novel vertical cylindrical and serpentine metal-insulator-metal (MIM) capacitors and a method for forming such capacitors.
As semiconductor geometries continue to become smaller and smaller, new difficulties arise in the fabrication of semiconductor devices. As one example, with progressively finer design rules, a problem has arisen due to capacitance between adjacent metal layers (i.e. interlayer capacitance). That is, as devices shrink in size, adjacent layers are spaced more closely together. Such a condition results in a deleterious increase in interlayer capacitance which adversely affects operation of finer design rule-based semiconductor devices. A similar problem exists due to the reduced distance between adjacent metal lines. Specifically, under some circumstances, unwanted effects such as cross-talk and various other RC (resistance/capacitance) delay effects between closely spaced metal lines negatively affect the operation of the semiconductor devices.
In one attempt to reduce such deleterious effects, newer semiconductor fabrication techniques are employing lower resistance metals (e.g. copper) to form many metal elements (e.g. lines, interconnects, and the like). Such newer semiconductor fabrication techniques include, for example, damascene and dual-damascene processes which readily employ copper metal and which achieve highly desirable results. Unfortunately, copper, as an example, is not readily etched in the manner which conventionally-used aluminum, for example, is etched. As a result, certain structures, such as capacitors, which in the past have been readily formed, at least in-part, by the etching of aluminum, are not compatible with the newer semiconductor fabrication techniques such as, for example, copper damascene and copper dual-damascene processes.
When forming huge copper plates several problems such as dishing, cusping, and erosion occur. For example, using conventional chemical mechanical polishing (CMP), severe dishing may occur when the copper plates are larger than, for example, 8-10 micrometers. Therefore, large copper metal-insulator-metal (MIM) capacitors plates with a dimension larger than, for example, 10 micrometers by 10 micrometers are difficult to form with copper damascene and copper dual-damascene processes.
As yet another concern, in order to achieve widespread acceptance, and to ensure affordability, any method of forming a capacitor, which overcomes the above-listed drawbacks, should be compatible with existing semiconductor fabrication processes.
Furthermore, the desire for high density semiconductor devices, may be compromised by the presence of passive devices. In particular, high capacitance capacitors consume considerable surface area when manufactured according to many conventional techniques.
Thus, a need exists for a capacitor and a method for forming the capacitor wherein the capacitor and the formation method are compatible with newer semiconductor fabrication techniques. A further need exists for a capacitor and a method for forming the capacitor wherein the capacitor and the formation method meet the above need and are compatible with existing semiconductor fabrication processes such that significant revamping of semiconductor capital equipment is not required. A further need exists for a capacitor and a method for forming the capacitor which provides a high capacitance per unit area.
The present invention provides a capacitor and a method for forming the capacitor wherein the capacitor and the formation method are compatible with newer semiconductor fabrication techniques. The present embodiment further provides a capacitor and a method for forming the capacitor wherein the capacitor and the formation method achieve the above-listed accomplishment and are compatible with existing semiconductor fabrication processes such that significant revamping of semiconductor capital equipment is not required. The present embodiment further provides a capacitor and a method for forming a capacitor with huge copper plates, for example, larger than 100 square micrometers. The present embodiment provides for a capacitor and a method for forming a capacitor with a high capacitance per unit area.
In one method embodiment, the present invention recites forming an opening in a substrate during a damascene process. The present embodiment then recites forming a dielectric region having two curvilinear surfaces opposite one another at least partially within the opening during the damascene process. The surfaces are curvilinear with respect to a horizontal cross-section. The present embodiment then recites forming a first copper region having a curvilinear surface proximate one of the surfaces of the dielectric region during the damascene process. The present embodiment then recites forming a second copper region having a curvilinear surface proximate a second surface of the dielectric region during the damascene process. In so doing, the dielectric region forms a dielectric barrier between the first copper region and the second copper region such that the vertical cylindrical MIM capacitor is formed.
Another embodiment performs the above steps in which the curvilinear surfaces are cylindrical. In this fashion, a vertically oriented cylindrical MIM capacitor is formed.
Yet another embodiment performs the above steps in which the curvilinear surfaces are serpentine. In this fashion, a vertical serpentine MIM capacitor is formed.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.